Study of the logic of work. logical elements. Study of typical logical elements Laboratory work logical elements
E.N. Malysheva
Basics
Microelectronics
Laboratory workshop
Tobolsk - 2012
UDC 621.3.049.77
Published by decision of the Department of Technology and Technical Disciplines of the TSPI named after. DI. Mendeleev
Malysheva E.N. Fundamentals of microelectronics. Laboratory workshop: Textbook. – Tobolsk: TGPI named after. DI. Mendeleeva, 2012. – 60 p.
Reviewer: Novoselov V.I., Ph.D. Sc., Associate Professor, Department of Physics and MPF
© Malysheva E.N., 2012
© TGPI named after. DI. Mendeleev, 2012
Explanatory note
This textbook is made in the form of a workbook and is offered to accompany a laboratory workshop for students of pedagogical universities studying the fundamentals of microelectronics. The laboratory workshop is conducted using a universal stand and is devoted to the study of elements, components and devices of digital technology.
1. Study of the operation of basic logical elements.
2. Study of the operation of triggers.
3. Study of the operation of registers.
4. Study of the operation of combinational code converters.
5. Study of the operation of meters.
6. Study of the operation of the adder.
7. Study of the operation of an arithmetic-logical device.
8. Study of the operation of a random access memory device.
9. Study of the operation of a computer model.
Each work includes the following sections:
Theoretical material, the mastery of which is necessary to complete the work;
Description of work;
Questions for the assessment of this work.
Laboratory work No. 1.
Study of the operation of basic logical elements
Goal of the work: study of operating principles and experimental study of the operation of logical elements.
General information
Logical elements, together with storage elements, form the basis of computers, digital measuring instruments and automation devices. Logic elements perform the simplest logical operations on digital information. They are created on the basis of electronic devices operating in key mode, which is characterized by two key states: “On” - “Disabled”. Therefore, digital information is usually represented in binary form, when the signals take only two values: “0” (logical zero) and “1” (logical one), corresponding to the two states of the key. These two positions (logical 1 and logical 0) constitute the electronic alphabet, or the basis of binary code.
The input of any digital device receives a set of code words, which it converts into other code words or a word. The output codewords are a certain function for which the input codewords are the argument of this function. They are called logical algebra functions.
Logical functions, like mathematical ones, can be written in the form of a formula or table - a truth table, which lists all possible combinations of arguments and the corresponding values of logical functions. A device designed to perform certain functions of the algebra of logic is called a logical element. Let's look at some of them.
Logic element NOT
logical negation (inversion). The logical negation of a statement A is a statement X that is true when A is false..
Logic element AND
Designed to perform a function logical multiplication (conjunction).Logical multiplication is a connection between two simple statements A and B, as a result of which a complex statement X is true only if both statements are true at the same time.
Logic element AND-NOT
Designed to perform a function negation of logical multiplication (negation of conjunction).The negation of multiplication or the Schaeffer function is a connection between two simple statements A and B, as a result of which a complex statement X is false only if both statements are true at the same time.
Work order
Equipment: universal stand, power supply, P1 board, technological cards I-1 - I-9.
1. Analyze the operation of the LED indicator of the stand to determine the levels of logical signals.
2. Examine the operation of logical devices, sequentially using technological maps. Complete the following tasks for each diagram:
A. fill in the truth tables,
b. using the data obtained, identify the logical elements,
V. name the logical algebra functions they perform,
d. designate the logical elements on the diagram with the corresponding symbols,
d. write down formulas expressing the relationship between input and output characteristics.
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Questions for testing 1. What is the purpose and scope of logical elements? 2. Define basic logical functions. 3. Using the LED indicator, determine the level of the logic signal at the output of the circuit. 4. Determine the types of logical elements in the circuit from the output data. 5. Based on the markings of integrated circuits located on the board used, give their characteristics. Laboratory work No. 2. General information More complex digital devices are built from logic elements. One of the most common components of digital technology is the trigger. A trigger is a device that has two stable equilibrium states and is capable of jumping from one state to another under the influence of a control signal. Each trigger state corresponds to a certain (high or low) output voltage level, which can be maintained for any length of time. Therefore, triggers are called the simplest digital automata with memory, i.e. their state is determined not only by the input signals at a given time, but also by their sequence in the previous clock cycles of the trigger. Currently, most flip-flops are based on logic elements in the form of integrated circuits (ICs). They are used as switching elements independently or as part of more complex digital devices, such as counters, frequency dividers, registers, etc. Based on the method of recording information, triggers are divided into synchronous and asynchronous devices. In asynchronous triggers, information is recorded directly with the arrival of input signals. In synchronous (clock) flip-flops, information will be recorded only if there is a clock sync pulse. According to their functional characteristics, triggers are distinguished: with separate triggering (RS-triggers), with delay elements (D-triggers), with counting triggering (T-triggers), universal (JK-triggers). Typically, a trigger has two outputs: forward () and inverse (). The state of the trigger is determined by the voltage at the direct output. Trigger inputs have the following designations: S – separate input for setting the trigger to a single state; R – separate input for setting the trigger to the zero state; D – information input; C – synchronization input; T – counting input and others. The basis of all flip-flop circuits is an asynchronous RS flip-flop. There are two types of RS flip-flops: those built on logical elements "OR-NOT" and logical elements "NAND". They differ in the level of active signals and have their own designation (see table). RS flip-flops have operating modes: setting to zero or one state, storage, prohibited mode. A forbidden combination (active signals are supplied to both inputs) is implemented when a contradictory command is given: simultaneously set to one and zero states. In this case, the same voltage levels are realized at the direct and inverse outputs, which by definition should not be the case. Clocked D-flip-flops have an input D for supplying information (0 or 1) and a clock input C. Synchronization pulses (C = 1) from a special pulse generator are supplied to input C. D flip-flops are free of prohibited combinations of input signals. A counting T flip-flop has one control input T. The trigger states change whenever the control signal changes. T-flip-flops of one type react to the front of a pulse, i.e. for a difference of 0-1, others - for a cut (difference of 1-0). In any case, the frequency of the output pulses is 2 times lower than the frequency of the input pulses. Therefore, T-triggers are used as frequency dividers by 2 or modulo 2 counters. Triggers of this type are not available as ICs. They can be easily created based on D and JK flip-flops. JK flip-flops are universal, they have information inputs J and K and a synchronizing input C. They are used to create counters, registers and other devices. With certain input switching, JK flip-flops can work as RS flip-flops, D flip-flops and T flip-flops. Due to this versatility, they are available in all IC series. Work order Equipment: universal stand, power supply, P2 board, technological cards II-1 - II-4. 1. Select a trigger in the circuit. 2. Complete the following tasks for each diagram: a) write down the name of the trigger, b) make a table of state changes depending on the input signals, indicate active signals with an arrow ( - high level - logical one, ¯ - low level - logical zero), c) determine the type of input (R or S), indicate these designations in the table and indicate on the diagram (for cards II-1 and II-2), d) indicate the operating modes of the trigger, e) draw up a time diagram of trigger states.
Trigger ______________________________________________________________
Trigger ______________________________________________________________
Trigger ______________________________________________________________
Questions for testing 1. What is a trigger? 2. Explain the purpose of flip-flop inputs. 3. What is active signal level? 4. What is the difference between synchronous and asynchronous triggers? 5. Explain the nature of the “forbidden” state in an RS flip-flop. 6. Using the diagram, tell us about the state of the trigger at each cycle of operation. 7. Based on the markings of integrated circuits located on the board used, give their characteristics. Laboratory work No. 3. General information A register is an operational unit consisting of flip-flops and designed to receive and store information in binary code. The length of the codewords written to the register depends on the number of trigger cells that make it up. Because a trigger can only take one stable state at a given time, then, for example, to write a 4-bit word you need to have a register of four trigger cells. Based on the method of writing code words, parallel, sequential (shifting) and universal registers are distinguished. In parallel registers, the codeword is written in parallel form, i.e. to all trigger cells simultaneously. In a serial register, the codeword is written sequentially, starting from the least significant or most significant digit. All flip-flops included in the register are united by a common synchronization input; some types of circuits have a common input R for the zeroing operation.
Work order Equipment: universal stand, power supply, boards P2, P3, jumper, technological cards II-5, II-6, III-1, III-2. 1. Write down the name of the device indicating its bit capacity. 2. Analyze the operation of two-bit registers. 3. Complete the following tasks for each diagram: a) write down the name of the register, b) write several different code words into the register, enter the results into a table of dependences of output states on input signals, c) draw a symbol for the device, II-5 (P2) |
II-6 (P2)
_______________________________________________________________
Conclusion: ________________________________________________________
________________________________________________________
4. For four-bit registers, complete the tasks:
a) write down the name of the register indicating its capacity,
b) sketch the internal logical structure,
c) write several different code words into the register, enter the results into a table of dependences of output states on input signals,
d) draw a conclusion: how many clock cycles does one code word take to write in this register?
III-1 (P3)
_______________________________________________________________
| Entrance | Exits | |||
| D | Q4 | Q3 | Q2 | Q1 |
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| Entrance | Exits | |||
| D | Q4 | Q3 | Q2 | Q1 |
Conclusion: _________________________________________________________
_________________________________________________________
III-2 (P3)
_______________________________________________________________
| Inputs | Exits | ||||||
| D4 | D3 | D2 | D1 | Q4 | Q3 | Q2 | Q1 |
Conclusion: ___________________________
___________________________
Questions for testing
1. What device is called a register? What is it for?
2. What types of registers do you know? How are they different?
3. Explain the concept of “bit depth”. What does the expression "4-bit register" mean?
4. How do you need to change the functional diagram to get a four-bit register from a two-bit register?
5. How many different words can be written using a 2 (4) bit register?
6. Explain on each functional diagram how you recorded the code word?
Laboratory work No. 4.
General information
Combinational code converters are designed to convert an m-element parallel code at the inputs of a digital machine into an n-element code at its outputs, i.e. to convert a codeword from one form to another. The relationship between input and output data can be specified using logical functions or truth tables. The most common types of code converters are encryptors, decryptors, multiplexers, and demultiplexers.
Encoders are used in information input systems to convert a single signal at one of its inputs into a multi-bit binary code at the outputs. Thus, the signal from each key on the keyboard, indicating a number or letter, is sent to the corresponding input of the encoder, and at its output this symbol is displayed in a binary code word. Decoders perform the reverse operation and are used in information output systems. To visually evaluate the output information, decoders are used together with display systems. One type of indicator is the 7-segment LED or liquid crystal indicator. To do this, the output signals of the decoder are converted into the code of a 7-segment indicator.
Multiplexers solve the problem of selecting information from several sources, demultiplexers solve the problem of distributing information across several receivers. These devices are used in digital technology processor systems to connect individual processor units with each other.
Work order
Equipment: universal stand, power supply, P4 board, technological cards IV-1, IV-2, IV-3.
1. Analyze the operation of the decoder.
2. Complete the following tasks for schemes IV-1 and IV-2:
a) make a table of the dependence of output states on input signals,
b) draw a conclusion: from which coding system does the device translate to which?
c) how many digits does a binary number have in circuit IV-2? What task does the SA5 toggle switch perform?
Multiplexer
3. Analyze the operation of a circuit containing a multiplexer and complete the tasks:
a) find the multiplexer in the diagram,
b) check where the information comes from at the multiplexer inputs,
c) check what device is used to set the address to the multiplexer,
d) set the multiplexer the address of the information input from which you want to send the signal to its output,
e) fill out the table of the dependence of the output signal on the input information and the address given to the multiplexer, entering different addresses and submitting different information to the inputs.
| Address | No. D-input connected to the output | Input information | Output Y | |||||||||
| A2 | A1 | A0 | D0 | D1 | D2 | D3 | D4 | D5 | D6 | D7 | ||
Questions for testing
1. What device is called a decoder? What is it for?
2. What device is called a multiplexer? What is it for?
3. What type of indication is used in scheme IV-2?
4. What does the expression “binary information coding system” (decimal, hexadecimal) mean?
SERGIEV POSAD
Laboratory work No. 1
Logic functions, ELEMENTS and circuits
Goal of the work
Study of logical functions, logic elements and circuits.
Devices and elements
Logic converter.
Word generator.
Voltmeter.
Logic probes.
Voltage source + 5 V.
Source of the "logical one" signal.
Two position switches.
Two-input elements AND, NAND, OR, NOR.
74 series chips.
Brief information from the theory
Axioms of algebra logic
Variables considered in the algebra of logic can take only two values - 0 or 1. In the algebra of logic, the equivalence relation (denoted by the = sign), the operations of addition (disjunction), denoted by the sign, multiplication (conjunction), denoted by the signs &, or the dot, are defined. and negation (or inversion), indicated by an overscore or an apostrophe."
The algebra of logic is defined by the following system of axioms:
x = 1 if x 0; x = 0 if x 1;
0&0 = 0; 1 1 = 1
1&1 = 1; 0 0 =0;
1&0 = 0&1 = 0; 0 1 = 1 0 = 1;
Boolean expressions
Logical expressions are usually written in conjunctive or disjunctive normal forms. In the disjunctive form, logical expressions are written as a logical sum of logical products, in the conjunctive form - as a logical product of logical sums. The procedure is the same as in ordinary algebraic expressions. Boolean expressions relate the value of a Boolean function to the values of Boolean variables.
Logical laws and identities
When transforming logical expressions, the following logical laws and identities are used
Logic functions
Any logical expression composed of n variables using a finite number of logical algebra operations can be considered as some function of n variables. Such a function is called logical. In accordance with the axioms of logical algebra, a function can take on the value 0 or 1, depending on the value of the variables. A function of n logical variables can be defined for 2 n variable values corresponding to all possible values of n-bit binary numbers. The main interest is the following functions of two variables x and at
f 1 (x,y) = x & y = x y = x – logical multiplication (conjunction),
f 2 (x,y) = x y – logical addition (disjunction),
f 3 (x,y) = = – Schaeffer stroke,
f 4 (x,y) = = – Pierce arrow,
f 5 (x,y) = x y = – addition modulo 2,
f 6 (x,y) = 
– equivalence.
Logic
A physical device that implements one of the operations of logical algebra or the simplest logical function is called a logical element. A circuit composed of a finite number of logical elements according to certain rules is called a logical circuit. The main logical functions correspond to the circuit elements that perform them.
Truth table
Since the domain of definition of any function of n variables is finite (2 n values), such a function can be specified by a table of values f(i) that it takes at points i, where i= 0,…,2 n -1. Such tables are called truth tables. Table 1 presents the truth tables defining the above functions.
Table 1
| Variable values | ||||||||
| x | at | f 1 | f 2 | f 3 | f 4 | f 5 | f 6 | |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 2 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 3 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
Carnot maps
If the number of logical variables does not exceed 5-6, it is convenient to transform logical equations using Karnaugh maps. The purpose of the transformations is to obtain a compact logical expression (minimization). Minimization is performed by combining adjacent sets (terms). The sets to be merged must have the same function values (all 0s or all 1s). For clarity, let's look at an example: let's say we need to find a logical expression for the majority function f m of three variables x, y, z, described by the truth table shown in Table 2.
table 2
Majoritarian function
| № | x | y | z | f m |
| 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 3 | 0 | 1 | 1 | 1 |
| 4 | 1 | 0 | 0 | 0 |
| 5 | 1 | 0 | 1 | 1 |
| 6 | 1 | 1 | 0 | 1 |
| 7 | 1 | 1 | 1 | 1 |
Here the row number is equal to the number i= 2 2 x+2 1 y+2 0 z formed by the values of the variables.
Let's make a Carnaugh map. It is something like a table in which the names of the columns and rows represent the values of the variables, and the variables are arranged in such an order that when moving to an adjacent column or row, the value of only one variable changes. For example, in the xy row of table 3, the values of the xy variables can be represented by the following sequences 00,01,11,10 or 00,10,11,01. The table is filled with function values corresponding to combinations of variable values. The table thus obtained looks as shown below (Table 3).
Table 3
Carnot map
majoritarian function
xy  z | 00 | 01 | 11 | 10 |
| 0 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 1 | 1 |
On the Karnaugh map we mark groups consisting of 2 k neighboring cells (2,4,8,) and containing 1, since they are described by simple logical expressions. The three ovals in the table define the logical expressions xy, xz, yz. Each oval joining two cells corresponds to logical transformations:
The compact expression describing the function is a disjunction of the logical expressions obtained using Carnaugh maps. As a result, we obtain an expression in disjunctive normal form
f m = xy v xz v yz .
If we combine 0, we get an expression in conjunctive normal form
f m = (x v y)(x v z)(y v z).
When implementing the majority function of three logical variables, we obtain a circuit that, when three signals are applied to its inputs, will generate an output signal equal to the signal at the majority of inputs (2 out of 3 or 3 out of 3). This circuit is used to restore the true value of the signals received at the 3 inputs if an error is possible at one of the inputs.
To implement this function on 2I-NOT elements, it is necessary to carry out the following transformations:
For DNF, a simpler expression was obtained, so it should be implemented. The corresponding circuit implementation is shown in Fig. 1.
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Rice. 1
STUDY OF LOGIC ELEMENTS
Goal of the work: 1) studying the principles of constructing serial logic chips;
2) study of logical functions of one and two variables and their implementation.
General information:
Logic elements(LE) are widely used in automation, computer technology and digital measuring instruments. They are created on the basis of electronic devices operating in a key mode, in which signal levels can take only two values. In positive logic, it is accepted that a high signal level corresponds to a logical one (1), and a low signal level corresponds to a logical zero (0).
A logical function expresses the dependence of output logical variables on input ones and takes the values 0 or 1. It is convenient to represent any logical function in the form of a state table (truth table), where possible combinations of arguments and the corresponding functions are written.
The operation of logic devices is analyzed using logic algebra (Boolean algebra), where a variable can only take two values: 0 or 1.
The main logical operations are (Table 1):
1) logical multiplication: y=x 1 · x 2 ·...· x n (read “and X 1, and X 2 ,..., and X n");
2) logical addition: y=x 1 +x 2 +...+x n (read “or X 1, or X 2 ,..., or X n");
3) logical negation: (read “not X”).
As can be seen from Table 1, the output signal of the OR element is equal to 1 if at least one of its inputs is supplied with a 1 signal. The AND element produces 1 if all inputs are supplied with 1 signals.
All possible logical functions of n variables can be formed using a combination of three basic operations: AND, OR, NOT. Therefore, such a set is called a logical basis or functionally complete. Using the laws of Boolean algebra (Table 1), it is possible to prove that such are sets of one AND-NOT, OR-NOT function.
The basic elements of the same series use the same microcircuit implementation. The series is characterized by general electrical, design and technological parameters.
The 155 series integrated circuits are transistor-transistor logic (TTL) gates with 14 or 16 pins. The basic element of the series is the NAND logic element, consisting of a multi-emitter transistor VT1 and a complex amplifier-inverter.
Table 1
| Item Type | Logic function (operation) | Logical Operation Notation | Truth table | Conditional Image | ||||
| x 1 | ||||||||
| x 2 | ||||||||
| NOT element (inverter) | Logical Negation, Inversion | ù x | x | X 1y | ||||
| Element AND (conjunctor) | Logical multiplication, Conjunction | x 1 · x 2 x 1 x 2 x 1 Ù x 2 x 1 &x 2 | x 1 · x 2 | x 1 & y x 2 y=x 1× x 2 | ||||
| OR element (disjunctor) | Logical addition, disjunction | x 1 +x 2 x 1 Ú x 2 | x 1 +x 2 | x 1 1 y x 2 y=x 1 +x 2 | ||||
| NAND element (Schaeffer element) | Negation of conjunction | _____ x 1 · x 2 | _____ x 1 · x 2 | x 1 & y x 2 y= | ||||
| NOR element (Pierce element) | Negation of disjunction | _____ x 1 +x 2 | _____ x 1 +x 2 | x 1 1 y x 2 y= |
Currently, several types of series of microcircuits with TTL elements are used: standard (series 133; K155), high-speed (series 130; K131), micro-power (series 134). In addition to expanding the range of elements of the K531 and K555 series, the most promising TTLSh series are now being actively developed - micro-power K1533 and high-speed K1531, made on the basis of the latest achievements in IC manufacturing technology - ion implantation and precision photolithography.
In recent years, programmable logic elements have developed, on which many digital devices can be built using programmers.
Any complex logical function can be implemented using LEs that perform the elementary functions AND-NOT, OR-NOT. Suppose you need to create a combinational circuit with four inputs x 1 , x 2 , x 3 , x 4 and one output y. A high voltage level should appear at the output only if there are high levels at three inputs, i.e. y=1 at x 1 =x 2 =x 3 =1 and x 4 =0. Such a scheme can be created by selecting elements. For example, the 3I-NOT element when applied to its inputs x 1 =x 2 =x 3 =1 gives the output signal y 1 =0. Serving it up and x 4 =0 to the input of the 2OR-NOT element, we get y=1 (Fig. 1).
Procedure for performing the experiment:
1) Install a block of logical elements (LE).
2) Connect the power supply GN1 to the “5V” sockets.
3) Study the principle of operation of LE. To do this, apply signals (0 or 1) to their inputs. Monitor the outputs using a logic tester.
4) Assemble combinational circuits on the LE (Fig. 2).
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Check their work. Create truth tables for the circuits under study.
1. Job title.
2. Goal of the work.
3. Logic element circuits.
4. Truth tables.
5. Conclusion on the work.
In the output, indicate the purpose of the logical elements and their scope of application.
Control questions:
1. What operations of logical algebra do you know?
2. Give examples of the simplest digital devices based on logical elements.
3. Explain the operation of basic logic gates.
4. How LEs are classified according to their microcircuit implementation.
STUDY OF TRIGGERS ON LOGIC ICs.
Goal of the work: studying the circuits and functionality of the main types of triggers; experimental study of triggers and control circuits.
A transistor is a component made of semiconductor material that allows you to control a sufficiently large electric current in a circuit by changing the current of a smaller value at the control electrode.
There are bipolar and field-effect transistors. They differ in that in a bipolar transistor charge transfer is carried out by both major and minority charge carriers - holes and electrons. In field-effect transistors, charge transfer is carried out by only one type of carrier.
Synthesis and study of elements based on transistor-transistor logic (TTL). TTL circuits are based on bipolar transistors of the NPN structure. Bipolar transistors get their name from the fact that charge transfer in them is carried out by two types of carriers - electrons and holes. The basic element of this technology is the NAND circuit. Logical multiplication is carried out due to the properties of a multi-emitter transistor.
OR-NOT element.
The implementation of the NOR logic element on bipolar transistors is shown in Figure 1.1.
The logical function NOR can be expressed by the functions AND and NOT using De Morgan's rules: the negation of a disjunction is a conjunction of negations. The circuit has two inverters VT1 and VT2, which are supplied using switches and voltages of opposite polarities. When a logical zero is applied to both inputs (“ground”), a discharge occurs in the p-region of the transistor, it becomes closed, and current begins to flow through transistors VT3, VT4, which perform the AND function, the voltage level is sufficient to ensure a logical one. If a logical unit (“plus”) is supplied to at least one input, then the voltage will drop at one of the inverter outputs; the voltage at the AND output will not be enough to provide a logical one.
Figure 1.1 - NOR logic element on bipolar transistors
Figure 1.2 - logical zeros are applied to the inputs of the OR-NOT element
Figure 1.2 shows a variant of the operation of a transistor circuit when logical zeros are applied to the inputs, resulting in a logical one at the output.
The OR-NOT element generates the following truth table (see Table 1.1):
Table 1.1 - Truth table of the NOR element
Element NOT.
The NOT element on TTL is shown in Figure 1.3.
Figure 1.3 - Logic inverter (logical NOT function)
When the switch is installed on the “plus” side, a small emitter current flows, this current allows the transistor to open, a voltage drop occurs and the indicator does not light up, which corresponds to logical zero. When the key is installed on the “ground” side, the plugging layer expands, the resistance of the transistor becomes much greater than the resistance of the resistor, the transistor is closed, there is no voltage drop, which corresponds to a logical one.
Truth table of the NOT element (see table 1.2).
Table 1.2 - Truth table of the NOT element
When logical units are supplied by closing the switches, sufficient current flows through the transistors near these switches and sufficient voltage is supplied to the input of the inverting transistor to open it, the current flows freely, the resistance of the inverting transistor is low, the voltage drops across the resistor at the inverter, and the output is logical zero.
When either one or zero, or both zeros are applied to the keys, the output voltage to the inverter is not enough to open it, its resistance is high and a high voltage level is formed at its collector, and the output is a logical zero.
The diagram of an AND-NOT element with a complex inverter is shown in Figure 1.5.
Figure 1.5 - NAND element with a complex inverter
The truth table for this element corresponds to Table 1.3.
This element consists of three stages: input (R1, VT1, VT2 - multi-emitter transistor model), phase inversion (VT3, R2, R4) and output amplifier (VT4, VT5, VD3, R3).
When logical units are applied to inputs x 1 and x 2, a collector current appears on transistors VT1, VT2 and flows into the base of transistor VT3, opening it. Part of the emitter current VT3 flows into transistor VT5, it opens, the output y is set to a low voltage level, while VT4 is closed (there is not enough voltage through the base-emitter junction VT4 and VD1). When at least one logical zero is applied, the collector current of transistors VT1, VT2 stops, VT3 and VT5 close, VT4 opens. Since VT5 is closed, a high voltage level is generated at the output.
Synthesis and study of elements based on MOS transistors.
The development of computer circuitry based on MOS transistors began with the advent of the induced-channel field-effect transistor in 1962. Circuits based on MOS transistors are characterized by relative ease of manufacture, compactness, low power consumption, and high noise immunity to changes in supply voltage. MOS transistors have a metal-dielectric-semiconductor structure and are generally called MOS transistors. Since the dielectric is based on SiO 2 oxide, the name MOS transistors (unipolar, channel) is used. The metal electrode to which the control voltage is supplied is called the gate (G) and the other two electrodes are called the source (I) and drain (C). The operating current flows from source to drain. For the p-channel the drain polarity is negative, and for the p-channel it is positive. The main wafer of the semiconductor is called the pad (P). A channel is a near-surface conducting layer between the source and drain, in which the current value is determined using an electric field.
There are no injection or diffusion processes in the channel. The operating current in the channel is caused by the drift in the electric field of electrons in n-channels and holes in p-channels.
When the control voltage is zero, the channel is absent and no current flows. A channel that is formed under the action of an external control voltage is called induced. The voltage at which a channel is formed is called the threshold voltage. A channel with an initial additional charge concentration is called built-in. The performance of n-MOS transistors is 5-8 times higher than the performance of p-MOS transistors, since the mobility of electrons is significantly greater than that of holes. In MOS circuits, resistors are completely eliminated; their role is performed by MOS transistors.
OR-NOT element.
The diagram of the OR-NOT element is shown in Figure 1.6.
Figure 1.6 - NOR element on MOS transistors
Transistor VT1 acts as a resistor since MOS transistors have high resistance; in order for it to pass current, the source is connected to the positive pole of the source. When logical zeros are simultaneously applied to transistors VT2 and VT3, they close, they create a load after transistor VT1, the level of this voltage corresponds to a logical one. The truth table of this element corresponds to table 1.1. If at least one or both logical units are applied to the input, one of the transistors VT2 and VT3 (or both) will open, a voltage drop will occur, and the output will be logical zero.
AND-NOT element.
The AND-NOT element is shown in Figure 1.7.
Figure 1.7 - AND-NOT element on MOS transistors
OR element.
Element I.
Synthesis and study of elements on KMDP structures.
OR-NOT element.
AND-NOT element.
Synthesis and study of elements based on emitter-coupled logic (ECL).
The circuitry of ESL elements is based on the use of a differential amplifier in current switching mode. ESL elements appeared in 1967 and are currently the fastest among silicon-based semiconductor elements. Signal propagation delays in ESL elements have decreased to the subnanosecond range (approximately 1 ns).
The ultra-fast performance of ESL elements is achieved through the use of an unsaturated operating mode of transistors, output emitter followers, and low amplitudes of logic signals (about 0.8 V). ESL logic elements have a paraphase output, which allows you to simultaneously obtain the direct and inverse value of the function being implemented. This gives a noticeable reduction in the total number of chips in the equipment.
Features of ESL circuitry and its characteristics are:
Possibility of combining the outputs of several elements to form new functions;
Possibility of working with low-impedance loads due to the presence of emitter followers;
Low value of switching work and independence of power consumption from switching frequency;
High stability of dynamic parameters when changing temperature and supply voltage;
The use of a negative power supply and grounding of the collector circuits, which reduces the dependence of the output signals on noise in the power buses.
The disadvantages of ESL elements include the complexity of the circuits, significant power consumption and difficulties in matching with TTL and TTLSh microcircuits.
Element I.
OR element.
AND-NOT element.
OR-NOT element.
Synthesis and study of the NOT element on MOS transistors () in positive and negative logic.
Goal of the work .
Familiarization with the basic functions and laws of logic algebra, the characteristics of logic chips, the basics of analysis and synthesis of simple and complex logic circuits.
Analysis of the operation of digital devices and synthesis of logical circuits is carried out on the basis of the mathematical apparatus of logic algebra or “Boolean” algebra, which operates with only two concepts: true (logical “1”) and false (logical “0”). Functions that display such information, as well as devices that form logic algebra functions, are called logical. Logical functions of several variables determine the nature of logical operations, as a result of which a set of input variables x 0 , x 1 ,…, x n -1 the output variable is assigned F
F = f(x 0 , x 1 ,…, x n -1 ).
The transformation function is characterized by a table in which each combination of input variables corresponds to the value of the output variable F.
It is called a truth table.
The main functions of logical algebra, with the help of which you can carry out any logical transformations, are logical multiplication (conjunction), logical addition (disjunction) and logical negation (inversion).
Algebra of logic allows you to transform formulas that describe complex logical dependencies in order to simplify them. This helps ultimately determine the optimal structure of a particular digital machine that implements any complex function. The optimal structure is usually understood as such a construction of an automaton in which the number of elements included in its composition is minimal..
Basic laws of algebra logic
Travel law: + a = ab+ a; = ab.
ba
Combination law:
(a + b) + c = a + (b + c); (ab)c = a(bc).
Distributive law:
a(b + c) = ab + ac; a + bc = (a + b)(a +c).
Law of absorption:
a + ab = a(1 + b) = a; a(a + b) = a + ab = a.
+ a;
+
Travel law:
=
Travel law:;
(Travel law:
+
a)(Travel law:
+
)
=
Travel law:.
Law of gluing:
Law of Negation:
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or Logic elements . 0 Logic elements use only two levels as input and output voltage values: “high” and “low”. If logical “0” corresponds to a low level voltage, and logical “1” to a high level, then such logic is called positive, and vice versa, if logical “0” is taken to be a high level voltage, and logical “1” is taken to be a low level voltage, then This kind of logic is called negative. In transistor-transistor logic (TTL), the voltage of logical “0” is . 1 U
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is tenths of a volt (less than 0.4 V), and the voltage of logical “1” is |
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The simplest function in logical algebra is the NOT function. It is implemented using an inverter, the graphical symbol of which is shown in Fig. X 1. The value is supplied to the inverter input , which can take two values: “0” and “1”. Output value Y X, also takes two values: “1” and “0”. One-to-one correspondence , which can take two values: “0” and “1”. Output value And , which can take two values: “0” and “1”. Output value is given by the truth table (Table 1), and the value of the output quantity X:
, which can take two values: “0” and “1”. Output value
=
.does not depend on previous values, but only on the current value of the input quantity , which can take two values: “0” and “1”. Output value This is true for all non-memory logic gates whose truth table contains the value
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does not depend on the order of the lines. |
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L , which can take two values: “0” and “1”. Output value The logical elements that implement the functions of logical addition and logical multiplication are the OR and AND elements. The truth tables for these elements uniquely relate the value of the output quantity X with the values of two (or more) input quantities ,
X 2
,
... x n l , which can take two values: “0” and “1”. Output value. with the values of two (or more) input quantities + X 2 Conventional graphic symbols of logical elements OR and AND are shown in Fig. 1, respectively. 2 and 3, and their truth tables are in tables 2 and 3. For example, for a 2-OR logical element implementing the disjunction , which can take two values: “0” and “1”. Output value. with the values of two (or more) input quantities X 2 ,
= x
, which can take two values: “0” and “1”. Output value. with the values of two (or more) input quantities X 2 Conventional graphic symbols of logical elements OR and AND are shown in Fig. 1, respectively. 2 and 3, and their truth tables are in tables 2 and 3. For example, for a 2-OR logical element implementing the disjunction , which can take two values: “0” and “1”. Output value. with the values of two (or more) input quantities X 2 .
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or |
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Table 3 N
and a set of logical elements AND, OR, NOT can implement any arbitrarily complex logical function, therefore this set of elements is called functionally complete.
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In practice, an extended set of logical elements is often used, which also makes it possible to compose functionally complete systems. These include elements:
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NOR (Pierce gate) implementing the function
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NAND (Schaffer element) implementing the function |
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Their designations and truth tables are shown in Fig.
4 and in table. 4.
Table 4
Before moving on to the issues of analysis and synthesis of logical devices in a given basis of elements (AND-NOT), it is necessary to compile a table that will summarize all possible forms of representing the output signals of these elements, provided that logical variables are supplied to their inputs X with the values of two (or more) input quantities, also takes two values: “1” and “0”. One-to-one correspondence X 2 .
When synthesizing circuits, two techniques can be used: double inversion of the input original expression or part of it and the use of De Morgan's theorems. In this case, the function is converted to a form containing only the operations of logical multiplication and inversion, and is rewritten using the symbols of the AND-NOT and NOT operations.
The sequence of analysis and synthesis of combinational logic circuits:
Drawing up a table of the functioning of a logical circuit (truth table).
Writing a logical function.
Minimizing a logical function and converting it to a form convenient for implementation in a given basis of logical elements (NAND, NOT). .
An example of analysis and synthesis of logical circuits
Let it be necessary to build a majority cell (voting cell) with three inputs, i.e. such a cell in which the output signal is equal to one when there is a one signal at two or three inputs of the circuit, otherwise the output signal must be equal to zero. X 1 , X 2 , X 3 First, let's fill out the truth table (Table 5). Since in this case there are three input signals F, each of which can take one of two possible values (0 or 1), then there can be a total of eight different combinations of these signals. Four of these combinations will correspond to the output signal
, equal to one.
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x 1 |
x 2 |
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5, you can write down the logical function that the synthesized circuit must implement. To do this, you need to present this function as a sum of logical products corresponding to those rows of the table. 5 (3, 5-7), for which the function
equal to one. Arguments are written without inversion if they are equal to one and with inversion if they are equal to zero.
F= . (1)
If in the synthesized truth table the output value more often takes the value “1”, then rows in which the output value is equal to “0” are synthesized.
F = =
+
=
. (2)
When executing the given procedure, we obtain the function
Analyzes (compilation of truth tables) of more complex logical circuits are carried out in a similar way.
To complete the task, a set of the most common logical elements is proposed (Fig. 5).
Rice. 5. A set of logical elements to complete a task
Laboratory assignment
1. Compile truth tables for all logical elements shown in Fig. 5.
2. For each logical element from the set shown in Fig. 5. compose logical expressions that implement their functions in the basis of logical elements NOT and NAND and draw the resulting identical circuits.
3. Assemble the considered circuits on the stand and, by searching through combinations of input signals, compile their truth tables.
4. Using the laws of negation (De-Morgan’s theorem), transform the minimized function (2) to implement it in the basis of logical elements NOT and NAND and draw the resulting identical circuit.
5. Assemble the presented circuit on the stand and, by searching through combinations of input signals, check the compliance of its operation with the truth table (Table 5).
Control questions
What is a functionally complete system and a basis of logical elements?
What are the features of logic device synthesis?
What are the principles of minimizing logic devices?
Name the basic operations of Boolean algebra.
What do the theorems of Boolean algebra reflect?
Formulate De Morgan's theorems: absorption and gluing.
What digital devices are called combinational?
